TDK Lambda | Z+Low Voltage User Manual

9.3.2 Status Register The status register sets a bit when status changes (Refer to Table 9-2). The bit is cleared when the condition is removed.

Bit Number

Decimal Value

Bit Symbol

Description

0 1 2 3 4 5 6 7 8 9

1 2 4 8

CV CC

Set high if Constant Voltage Operation Set high if Constant Current Operation

NFL TW AST FBE LSC LOC

No fault

Trigger wait

16 32 64

Auto Start Enabled Foldback enable List step complete

128 256 512

Local / Remote

UVP Ena ILC Ena

Under voltage Protect enabled

Interlock Enabled

10 11 12 13 14 15

1024 2048 4096 8192

FBC AVP ACP DWE

Foldback CC mode enabled

Remote Analog Voltage Programming mode Remote Analog Current Programming mode

16384 32768

The list step is active (dwelling)

Reserved

Table 9-2: Bit Configuration of Operation

9.4 Conditional, Enable and Event Registers

9.4.1 Conditional Registers. The condition registers show a snapshot of the power supply state at the present time. Some faults or mode changes occur and clear quickly before the control computer can detect them. The change may be latched in EVENT REGISTERS so the computer can detect them even if they cleared quickly. 9.4.2 Event Registers. Bits are sent to the Event register when a fault or mode change occurs. The bit remains set until the control computer reads the Event register or clears it. The control computer cannot tell if the fault or mode change occurred more than once since the last time the Event register was read. 9.4.3 Enable Register The Status and Fault Enable registers are set by the user to enable SRQs in the event of changes in power supply status or fault. 9.5 Service Request A SRQwill be sent when the contents of at least one of the event registers changes from all zeroes to any bit(s) set. When SRQ occurs, power supply sends ”!nn”message (nn-power supply address).

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